1. Field of the Invention
The present invention relates to a waveform observation unit capable of observing an analog waveform output from a device under test, a waveform input circuit corresponding to an input section of the waveform observation unit, and a semiconductor test apparatus comprising the waveform observation unit. More particularly, it relates to a waveform input circuit, a waveform observation unit and a semiconductor test apparatus suitable for enabling faithful observation of an output waveform of even a device under test which is not capable of driving a transmission line because of high output impedance and low load driving capability.
2. Description of the Related Art
Some semiconductor test apparatuses for which a device under test (DUT) is a semiconductor integrated circuit such as an IC or LSI comprise a waveform observation unit to observe an analog waveform output from the device under test (e.g., refer to Japanese Patent Publication Laid-open No. 2001-007660).
Here, a circuit configuration of a conventional waveform observation unit is shown in FIG. 8.
As shown in this drawing, a waveform observation unit 100 comprises a waveform input circuit 110, a low pass filter 120, a clock generator 130, an A/D converter 140, a waveform acquisition memory 150 and a trigger generator 160.
In this arrangement, the waveform input circuit 110 receives an output waveform from a device under test 200, and then sends it to the low pass filter 120. The low pass filter 120 is an A/D converter prefilter provided to restrict the band of an analytic analog signal within Nyquist frequency. The A/D converter 140 samples the analog signal synchronously with a clock supplied from the clock generator 130, and converts it into a digital signal. The waveform acquisition memory 150 receives the digital signal (data) from the A/D converter 140 synchronously with the clock from the clock generator 130. The trigger generator 160 provides an observation timing signal to the waveform acquisition memory 150, and controls a recording time range of the data.
It is to be noted that in the semiconductor test apparatus, the waveform observation unit 100 is provided in a system LSI tester, and the device under test 200 is provided in a test board (see FIG. 10).
Furthermore, there is shown in FIG. 9 a circuit configuration of a waveform input circuit which is an input section of the waveform observation unit.
As shown in this drawing, a waveform input circuit 110a comprises a transmission line (input signal transmission line) 111 through which an output waveform from the device under test 200 is transmitted, a terminating resistance 50Ω, a terminating resistance 1 MΩ (Hi impedance), a relay (selection means) 112 which selects any one of the terminating resistances, and a Hi impedance input amplifier 113.
In this conventional waveform input circuit 110a, the relay 112 can be controlled to select from the terminating input 50Ω corresponding to the impedance of the transmission line 111 and the Hi impedance (1 MΩ in FIG. 9) terminating input which reduces a load current of the device under test 200.
Furthermore, a DC measurement interrupt path 114 is connected to the waveform input circuit 110a. This DC measurement interrupt path 114 is a path connected in addition to paths for waveform observation to check whether or not electrical connections within the device under test 200 is good. The DC measurement interrupt path 114 applies a voltage to the device under test 200 to perform DC-measurement to see whether or not there is a leakage of a minute electric current.
On the other hand, in the waveform observation unit 100 as shown in FIG. 8, it is preferable that the output signal waveform from the device under test 200 can be faithfully observed.
To this end, a cable with a characteristic impedance of 50Ω is used for the transmission line 111 from the device under test 200 to the waveform observation unit 100 to obtain a good high-frequency transmission characteristic. Moreover, a printed board signal wiring line pattern inside the waveform observation unit 100 is designed to have as low stray capacitance as possible so as to achieve an ideal 50Ω transmission line.
However, some devices under test can not drive the transmission line because of high output impedance and low load driving capability, so that there has been a problem that an output waveform from the device under test can not be faithfully observed by the conventional waveform observation unit in some cases.
Here, for example, there has heretofore been means for solving such a problem, wherein a switch is turned to the terminating resistance 1 MΩ (Hi impedance terminating input) as shown in FIG. 9.
For example, impedance matching of the device under test, the waveform observation unit and the transmission line therebetween is important to faithfully observe a broadband waveform, and thus, in a case of a device with the sufficient load driving capability, the waveform is observed with a 50Ω termination on the side of the waveform observation unit. On the contrary, in a case of a device with high output impedance and low load driving capability, it is necessary to receive a signal at high impedance on the side of the waveform observation unit (Hi impedance terminating input), thereby reducing a load current for observation of the waveform.
Furthermore, another solving means has heretofore been proposed wherein a Hi impedance input amplifier (a buffer circuit with high load current driving capability) 300 is additionally connected in the close vicinity of the device under test 200, as shown in FIG. 10.
In such a circuit configuration, a load driving circuit such as the Hi impedance input amplifier 300 can drive the transmission line 111.
However, the following problems have occurred in the above solving means.
First, in the waveform input circuit shown in FIG. 9, when the output impedance of the device under test is high, not only input stray capacitance of the waveform observation unit but also the transmission line behaves as capacity. Thus, a problem arises wherein the rising edge of the device output waveform becomes dull (the rising edge delays) since the output waveform has to charge the capacitance including the transmission line.
One example of measurement results of this device output waveform is shown in FIG. 11. This drawing is a graph showing the measurement result of the output waveform (thick full line) of the device under test in comparison with the measurement result of the waveform (thin dotted line) after the passage through the transmission line. As shown, the waveform after the passage through the transmission line is dull.
It is to be noted that in connection with FIG. 11, the transmission line has a characteristic impedance of 50Ω, a length of 1 m and an input capacity of 100 pF, and when output impedance is 1 kΩ, a signal observation band is 1.6 MHz.
Furthermore, the configuration shown in FIG. 10 is not desirable in that if circuits are added in the vicinity of the device under test 200, a design cost for the test board is increased, and problems are caused in reliability and maintainability.
However, on the test board, there is needed another path which directly connects the device under test 200 and the transmission line 111, in addition to the Hi impedance input amplifier 300. This path is used for measurement using the DC measurement interrupt path 114 provided on the side of the system LSI tester.